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Logic Gates GATE Questions

Practising previous years’ GATE Questions papers are the most widely used way to prepare for the GATE Exam. Candidates can practise, analyse and understand concepts while solving them. It helps students strengthen their time management skills. We have attempted to compile, here in this article, a collection of GATE Questions on Logic Gates.

Candidates are urged to practise these Logic Gates GATE previous years’ questions to get the best results. Logic Gates is an important topic in the GATE question papers, and solving these questions will help the candidates to prepare more proficiently for the EE GATE exams. Therefore, candidates can find the GATE Questions for Logic Gates in this article to solve and practise before the exams. They can also refer to these GATE previous year question papers and start preparing for the exams.

GATE Questions on Logic Gates

  1. A bulb in the staircase has two switches, one switch being on the ground floor and the other one on the first floor. The bulb can be turned ON and also can be turned OFF by any one of the switches, irrespective of the state of the other switch. The logic of switching on the bulb resembles ______.
  2. (GATE EE 2013)

    1. An AND gate
    2. An OR gate
    3. An XOR gate
    4. A NAND gate

    Answer (c)

  3. The complete set of only those Logic Gates designated as Universal gates is ______.
  4. (GATE EE 2009)

    1. NOT, OR and AND gates
    2. XNOR, NOR and NAND gates
    3. NOR and NAND gates
    4. XOR, NOR and NAND gates

    Answer (c)

  5. The output of a logic gate is ″1″ when all its inputs are at logic ″0″. The gate is either ________.
  6. (GATE EE 2001)

    1. A NAND or an Ex-OR gate
    2. A NOR or an EX-OR gate
    3. An AND or an EX-NOR gate
    4. A NOR or an EX-NOR gate

    Answer (d)

  7. Consider the following circuit, which uses a 2-to-1 multiplexer, as shown in the figure below. The Boolean expression for output F in terms of A and B is _________.
  8. (GATE EE 2016 Set 1)

    Diagram 1

    1. \(\begin{array}{l}A\bigoplus B\end{array} \)
    2. \(\begin{array}{l}\overline{A + B}\end{array} \)
    3. A + B
    4. \(\begin{array}{l}\overline{A \bigoplus B}\end{array} \)

    Answer (d)

  9. The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is _______.
  10. (GATE EE 2012)

    1. 4
    2. 6
    3. 8
    4. 10

    Answer (b)

  11. When a program is being executed in an 8085 microprocessor, its Program Counter contains ______.
  12. (GATE EE 2002)

    1. The number of instructions in the current program that have already been executed
    2. The total number of instructions in the program being executed
    3. The memory address of the instructions that are being currently executed
    4. The memory address of the instruction that is to be executed next

    Answer (d)

  13. The logic circuit used to generate the active low chip select (CS) by an 8085 microprocessor to address a peripheral is shown in Fig. The peripheral will respond to addresses in the range ________.
  14. (GATE EE 2002)

    Diagram 2

    1. E000 – EFFF
    2. 000E – FFFE
    3. 1000 – FFFF
    4. 0001 – FFF1

    Answer (a)

  15. In a microprocessor, the address of the next instruction to be executed is stored in ________.
  16. (GATE EE 1997)

    1. Stack pointer
    2. Address latch
    3. Program counter
    4. General-purpose register

    Answer (c)

  17. In standard TTL gates, the totem pole output stage is primarily used to _______.
  18. (GATE EE 1998)

    1. Increase the noise margin of the gate
    2. Decrease the output switching delay
    3. Facilitate a wired OR logic connection
    4. Increase the output impedance of the circuit

    Answer (b)

  19. A state diagram of a logic gate that exhibits a delay in the output is shown in the figure, where X is the don’t care condition, and Q is the output representing the state.
  20. Diagram 3

    The logic gate represented by the state diagram is ________.

    (GATE EE 2014 Set 3)

    1. XOR
    2. OR
    3. AND
    4. NAND

    Answer (d)

  21. Among the following four, the slowest ADC (analog-to-digital converter) is ________.
  22. (GATE EE 2001)

    1. parallel- comparator, i.e. flash type
    2. successive approximation type
    3. integrating type
    4. counting type

    Answer (c)

  23. A 10 bit A/D converter is used to digitise an analog signal in the 0 to 0.5 V range. The maximum peak to peak ripple voltage that can be allowed in the D.C. supply voltage is _______.
  24. (GATE EE 1993)

    1. nearly 100 mV
    2. nearly 50 mV
    3. nearly 25 mV
    4. nearly 5.0 mV

    Answer (d)

  25. The voltage comparator shown in Fig. can be used in the analog-to-digital conversion as ________.
  26. (GATE EE 2004)

    Diagram 4

    1. A 1-bit quantizer
    2. A 2-bit quantizer
    3. A 4-bit quantizer
    4. A 8-bit quantizer

    Answer (a)

  27. Among the following four, the slowest ADC (analog-to-digital converter) is ________.
  28. (GATE EE 2001)

    1. Parallel-comparator, i.e. flash type
    2. Successive approximation type
    3. Integrating type
    4. Counting type

    Answer (c)

  29. The number of comparisons carried out in a 4-bit flash type A/D converter is ________.
  30. (GATE EE 1994)

    1. 16
    2. 15
    3. 4
    4. 3

    Answer (b)

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