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Question
Consider the following logic diagram :
After applying 4 clock pulses, which input sequence(s) for ABC will always generate logic 1 at the output Z. (Assume initially all flip-flops are cleared)
Consider the following logic diagram :
After applying 4 clock pulses, which input sequence(s) for ABC will always generate logic 1 at the output Z. (Assume initially all flip-flops are cleared)
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Solution
The correct option is D 110
Output, Z=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯(A+B)[(¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A+B)C]=1
So for ABC = 101,110,111,001 will always generate output Z=1
Output, Z=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯(A+B)[(¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A+B)C]=1
So for ABC = 101,110,111,001 will always generate output Z=1
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