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Question

# In the circuit shown below, the condition to be satisfied such that the silicon transistor will never enter into saturation is (Assume VBE=0.7V,VCE(sat)=0V)

A
RB>116.25kΩ
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B
RB<116.25kΩ
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C
RB>232.5kΩ
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D
RB<232.5kΩ
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Solution

## The correct option is C RB>232.5kΩTransistor will enter into saturation region for VCE(sat)=0V Applying KVL in collector emitter loop, −20+(IC×10k)+VCE.sat=0 IC=20−VCE(sat)10k=2mA IB=ICβ=2×10−350=40μA Applying KVL in base emitter loop −10+IBRB+0.7=0 RB=10−0.740×10−6=232.5kΩ ∴ For all values of RB>232.5kΩ the transistor will not operate in saturation region.

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