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Pipelining in Computer Architecture

Pipelining is a technique for breaking down a sequential process into various sub-operations and executing each sub-operation in its own dedicated segment that runs in parallel with all other segments.

In this article, we will dive deeper into Pipelining in Computer Architecture according to the GATE Syllabus for (Computer Science Engineering) CSE. Keep reading ahead to learn more.

Table of Contents

Pipelining in Computer Architecture

Pipelining is a technique for breaking down a sequential process into various sub-operations and executing each sub-operation in its own dedicated segment that runs in parallel with all other segments.

The most significant feature of a pipeline technique is that it allows several computations to run in parallel in different parts at the same time.

By associating a register with every segment in the pipeline, the process of computation can be made overlapping. The registers provide separation and isolation among every segment, allowing each to work on different data at the same time.

An input register for each segment, followed by a combinational circuit, can be used to illustrate the structure of a pipeline organisation. To better understand the pipeline organisation, consider an example of a combined multiplication and addition operation.

A stream of numbers is used to perform the combined multiplication and addition operation, such as:

for i = 1, 2, 3, ……., 7

Ai* Bi + Ci

The operation to be done on the numbers is broken down into sub-operations, each of which is implemented in a segment of a pipeline. We can define the sub-operations performed in every segment of the pipeline as:

Input Ai, and Bi

R1 ← Ai, R2 ← Bi

Multiply, and input Ci

R3 ← R1 * R2, R4 ← Ci

Add Ci to the product

R5 ← R3 + R4

The combined and sub-operations conducted in each leg of the pipeline are depicted in the block diagram below:

R1, R2, R3, and R4 Registers hold the data. The combinational circuits then operate in a certain segment.

The output of a given segment’s combinational circuit is used as an input register for the next segment. The register R3 is used here as one of the input registers for a combinational adder circuit, as shown in the block diagram. The pipeline organisation, in general, is applicable to two areas of computer design. It includes:

1. Instruction Pipeline – An instruction pipeline receives sequential instructions from memory while prior instructions are implemented in other portions. Pipeline processing can be seen in both the data and instruction streams. Read more on Instruction Pipeline here.

2. Arithmetic Pipeline – An arithmetic pipeline separates a given arithmetic problem into subproblems that can be executed in different pipeline segments. It’s used for multiplication, floating-point operations, and a variety of other calculations. Read more on Arithmetic Pipeline here.

Video on Pipelining in Computer Architecture

Pipelining Hazards

Whenever any pipeline needs to stall due to any reason, it is known as a pipeline hazard. Some of the pipelining hazards are data dependency, memory delay, branch delay, and resource limitation. Read more on pipeline hazards here.

Practice Problems on Pipelining in Computer Architecture

1. Every stage in the pipelining process must be completed within how many cycles?

a. 4

b. 3

c. 2

d. 1

Answer – (d) 1

2. Which of these can be employed in pipelining to improve memory access speed?

a. Buffers

b. Cache

c. Special purpose registers

d. Special memory locations

Answer – (b) Cache

3. When the data for operands is unavailable, it is referred to as _________.

a. Structural hazard

b. Deadlock

c. Stock

d. Data hazard

Answer – (d) Data hazard

Frequently Asked Questions on Pipelining in Computer Architecture

Q1

What is a pipeline in a CPU?

Pipelining is a technique for breaking down a sequential process into various sub-operations and executing each sub-operation in its own dedicated segment that runs in parallel with all other segments.
The most significant feature of a pipeline technique is that it allows several computations to run in parallel in different parts at the same time.

Q2

What are pipelining hazards?

Whenever any pipeline needs to stall due to any reason, it is known as a pipeline hazard. Some of the pipelining hazards are data dependency, memory delay, branch delay, and resource limitation.

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