A hardwired CPU uses 10 control signals S1 to S10 in various time steps T1 to T5 to implement 4 instructions I1 to I4 as shown below.
T1 | T2 | T3 | T4 | T5 | |
I1 | S1,S3, S5 |
S2,S4, S6 |
S1,S7 | S10 | S3,S8 |
I2 | S1,S3, S5 |
S8,S9, S10 |
S5,S6, S7 |
S6 | S10 |
I3 | S1,S3, S5 |
S7,S8, S10 |
S2,S6, S9 |
S10 | S1,S3 |
I4 | S1,S3, S5 |
S2,S6, S7 |
S5,S10 | S6,S9 | S10 |