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Question

A hardwired CPU uses 10 control signals S1 to S10 in various time steps T1 to T5 to implement 4 instructions I1 to I4 as shown below.

T1 T2 T3 T4 T5
I1 S1,S3,
S5
S2,S4,
S6
S1,S7 S10 S3,S8
I2 S1,S3,
S5
S8,S9,
S10
S5,S6,
S7
S6 S10
I3 S1,S3,
S5
S7,S8,
S10
S2,S6,
S9
S10 S1,S3
I4 S1,S3,
S5
S2,S6,
S7
S5,S10 S6,S9 S10

Which of the following pairs of expressions represent the circuit for generating control signals S5 and S10 respectively
[(IJ+Ik)Tn indicates that the control signal should be generated in time step Tn if the instruction being executed is IJ or IK]?

A
S5=T1+(I2+I4).T3 and S10=(I2+I3).T2+I4.T3+(I1+I3).T4+(I2+I4).T5
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B
S5=T1+(I2+I4).T3 and S10=(I2+I3+I4).T2+(I1+I3).T4+(I2+I4).T5
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C
S5=T1+I2.T3 and S10=(I1+I3).T4+(I2+I4).T5
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D
S5=T1+(I2+I4).T3 and S10=(I1+I3).T4+(I2+I4).T5
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Solution

The correct option is A S5=T1+(I2+I4).T3 and S10=(I2+I3).T2+I4.T3+(I1+I3).T4+(I2+I4).T5
First we need to find hardware control signal S5:

In instruction I1,S5 present for T1 only, so T1,I1
In instruction I2,S5 present for T1,T3, so T1I2+T3I2
In instruction I3,S5 present for T1 only, so T1I3
In instruction I4,S5 present for T1,T3, so T1I4+T3I4

So, logic function is SOP form is:
=T1I1+T1I2+T3I2+T1I3+T1I4+T3I4
=T1(I1+I2+I3+I4)+T3I2+T3I4
=T1+T3I2+T3I4 (I1+I2+I3+I4=1)
=T1+T3(I2+I4)

Similarly for signal S10,SOP form will be:
=T4I1+T2I2+T5I2+T2I3+T4I3+T3I4+T5I4
=T4(I1+I3)+T2(I2+I3)+T5(I2+I4)+T3I4

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