Question

A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2's complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be:

• A. 0, 1, 0
• B. 1, 1, 0
• C. 1, 0, 1
• D. 1, 0, 0

Answer 1

The correct option is A 0, 1, 0

1 1 1
Number 1: 0 1 0 0 1 1 0 1
Number 2: 1 1 1 0 1 0 0 1
______________
Add 1 0 0 1 1 0 1 1 0
_______________

Since, $C_{out}⨁C_{in}=0$

Hence no overflow.

Carry present i.e. bits comes out from MSB.

MSB of addition is 0. So positive number.

So, output will be carry = 1, overflow =0, sign = 0