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All the logic...

Question

All the logic gates shown in the figure have a propagation delay of 20 ns. Let A = C =0 and B = 1 until time t = 0. At t =0, all the inputs flip (i.e. A = C = 1 and B = 0) and remain in that state. For t> 0, output Z = 1 for a duration (In ns) of

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Solution

Z is '1' for 40 n-sec

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