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Question

Consider a 2-way set associative cache with 4. blocks. The main memory contains 16 blocks. CPU generates requests for main memory blocks in following order:

0,4, 0, 8, 0, 4,1, 3, 1, 5, 1,3

Consider LRU (Least recently used) block replacement. Let's assume number of conflict misses for above requests is x and number of capacity misses is y. The value of x + 10y is_______.


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Solution

option (b)

no. of sets=42=2


0 Compulsory miss
4 Compulsory miss
0 Hit
8 Complusory miss
0 Hit
4 Conflict miss
1 Compulsory miss
3 Complusory miss
1 Hit
5 Compulsory miss
1 Hit
3 Capacity miss

x = 1, y = 1

x +10y =1 + 10 * 1

= 11

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