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Consider a hy...

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Consider a hypothetical processor with a instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of a constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?

A

Immediate Addressing

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B

Base Indexed Addressing

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C

Register Indirect Scaled Addressing

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D

Register Addressing

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Solution

The correct option is B Base Indexed Addressing
LW R1, 20(R2) Instruction shows the source address can be formed by adding the constant with the R2 content. It is the MIPS instruction. R2 points the base address of an array and 20 points the index address of an array. Hence the addressing mode used for the above is Based Indexed Addressing mode. This addressing mode is used to implement the Arrays.

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