Question

Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.

Instruction Operation Instruction
Size
(in words)

MOV R1, 5000 ; R1 $\leftarrow$ Memory [5000] 2

MOV R2, (R1) ; R2 $\leftarrow$ Memory [(R1)] 1

ADD R2, R3 ; R2 $\leftarrow$ R2 + R3 1

MOV 6000, R2 ; Memory [6000] $\leftarrow$ R2 2

HALT ; Machine halts 1

Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be

• A. 1020
• B. 1028
• C. 1024
• D. 1007

Answer 1

The correct option is C 1024


Instruction Instruction Size Location
(Decimal)


MOV $R_1$, 5000 2 1000 to 1007

MOV $R_0$, ($R_1$) 1 1008 to 1011

ADD $R_0$, $R_3$ 1 1012 to 1015

MOV 6000, $R_2$ 2 1016 to 1023

Halt 1 1024 to 1027


If an interrupt occurs the CPU has been halted after executing the HALT instruction the return address 1024 saved in the stack.