Considers pipeline system with 6 segments. Segment delays are 5 ns. 8 ns, 6 ns, 9 ns, 7 ns and 8 ns. Intermediate register delay is 1 ns which is used after each segment. In the pipeline 1000 instructions are executed. Among 1000 instructions 20% are branch instructions each of which incurs 3 pipeline stall cycles. 30% of total 1000 instructions cause resource conflict because of which 1 stall cycles incurred for each instruction. The speed-up of this pipeline as compared to the corresponding non-pipeline system is _______