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Function Implementation Using CMOS
For the NMOS ...
Question
For the NMOS logic gate shown in figure, the logic function implemented is
A
(
¯
¯¯¯¯¯¯¯¯¯¯¯¯¯
¯
A
+
B
)
.
C
+
¯
D
.
¯
E
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B
¯
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
¯
A
.
(
B
+
C
)
+
D
.
E
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C
¯
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
¯
A
B
C
D
E
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D
(
A
B
+
¯
C
)
.
(
¯
¯¯¯¯¯¯¯¯¯¯¯¯¯
¯
D
+
E
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Solution
The correct option is
B
¯
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
¯
A
.
(
B
+
C
)
+
D
.
E
F =
¯
¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯
¯
A
.
(
B
+
C
)
+
D
E
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