For the sequential circuit using three J-K flip flop and one AND gate shown below, output of the circuit becomes 1 after every N clock cycles. The value of N is______.
CLK | Q0 | Q1 | Q2 | Q+0 | Q+1 | Q+2 | J+0 | K0 | J1 | K1 | J2\ | K2 | Z |
Intially | 0 | 0 | 0 | 1 | |||||||||
1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 |
2 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
3 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 |
4 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 |
5 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
6 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 |