Question

In the following circuit the output Y becomes zero for the input combinations:

• A. A=1, B=0, C=0
• B. A=0, B=1, C=1
• C. A=0, B=0, C=0
• D. A=1, B=1, C=0

Answer 1

Answer: (D)

A=1, B=1, C=0

$Y=\overline{(A.B).\overline{C}}$

So, to get Y as 0, the inputs of the final NAND gate should be 1, 1.

This means, $A.B$ = 1 and $\overline{C}$ = 1

This is possible, when A = 1, B = 1 and C = 0