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Question

The arrangement given represents a logic gate.
Copy the following truth table and complete it showing outputs at C and D.
ABCD
00
10
01
11

788709_9fa67b7ba4aa4d6ab40f6a40752a940f.png

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Solution

Both the above gates are NAND gates which give output as 0 only when both the inputs are 1 whereas gives output as 1 in rest of the cases.
Hence the truth table for the above circuit is shown here.
783541_788709_ans_39300afbd2f34f32a0837cadc3e0fda7.png

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