The circuit as shown in figure, the equivalent gate is

NOR gate

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OR gate

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AND gate

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NAND gate

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Solution

The correct option is A NOR gate
Let the outputs of individual gates be labelled as X, Y and Z respectively starting from left to right. we have:
$Z = ¯ ¯¯ ¯ Y Y = ¯ ¯¯¯¯¯¯¯ ¯ X X = ¯ ¯¯¯ ¯ X + ¯ ¯¯¯ ¯ X = ¯ ¯¯¯ ¯ X X = ¯ ¯¯¯¯¯¯¯¯¯¯¯¯¯ ¯ A + B \Rightarrow Z = X = ¯ ¯¯¯¯¯¯¯¯¯¯¯¯¯ ¯ A + B$ .
Thus, the combination behaves as NOR gate.

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