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Question

The diagram of a logic circuit is given below. The output F of the circuit is given by


A
W.(X+Y)
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B
W.(X.Y)
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C
W+(X.Y)
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D
W+(X+Y)
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Solution

The correct option is D W+(X+Y)
The outputs from first NOR gates will act as inputs for NAND gate as shown,


Thus, the output F is given by,

F=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯(¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯W+X).(¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯W+Y)

Applying DeMorgan's theorem,

(¯¯¯¯¯¯¯¯¯¯¯A.B)=¯A+¯B

F=(¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯W+X)+¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯(¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯W+Y)

F=(W+X)+(W+Y)

F=(W+W)+(X+Y)

As, [W+W=W]

F=W+(X+Y)

Hence, option (D) is correct.

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