The output of the combination of the gates shown in fig is

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Solution

The correct option is A

Applying the logic of NAND and OR gates properly the output can be seen as $A + ¯ ¯¯¯¯¯¯¯¯¯¯ ¯ A . B .$

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The output of the combination of the gates shown in fig is

The correct option is A Applying the logic of NAND and OR gates properly the output can be seen as A+¯¯¯¯¯¯¯¯¯¯¯¯A.B.

The correct option is A

Applying the logic of NAND and OR gates properly the output can be seen as $A + ¯ ¯¯¯¯¯¯¯¯¯¯ ¯ A . B .$