The correct option is B Y=A+B
Let the output from the 1st gate and the 2nd gate be Y1 and Y2
Y1=¯¯¯¯¯¯¯¯¯¯¯¯A⋅A=¯¯¯¯A
Similarly, Y2=¯¯¯¯¯¯¯¯¯¯¯¯B⋅B=¯¯¯¯B
Now the inputs to the final NAND gate is Y1 and Y2.
∴Y=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯Y1⋅Y2
⇒Y=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A⋅¯¯¯¯B
By DeMorgan's theorem,
Y=¯¯¯¯¯¯¯¯A+¯¯¯¯¯¯¯¯B
⇒Y=A+B
Hence, option (B) is correct.