The truth table for the circuit given in the figure is :

⎡ ⎢ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ \begin{matrix} A & B & Y 0 & 0 & 1 0 & 1 & 1 1 & 0 & 0 1 & 1 & 0 \end{matrix} ⎤ ⎥ ⎥ ⎥ ⎥ ⎥ ⎥ ⎦

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⎡ ⎢ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ \begin{matrix} A & B & Y 0 & 0 & 1 0 & 1 & 0 1 & 0 & 0 1 & 1 & 0 \end{matrix} ⎤ ⎥ ⎥ ⎥ ⎥ ⎥ ⎥ ⎦

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⎡ ⎢ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ \begin{matrix} A & B & Y 0 & 0 & 1 0 & 1 & 1 1 & 0 & 1 1 & 1 & 1 \end{matrix} ⎤ ⎥ ⎥ ⎥ ⎥ ⎥ ⎥ ⎦

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⎡ ⎢ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ \begin{matrix} A & B & Y 0 & 0 & 0 0 & 1 & 0 1 & 0 & 1 1 & 1 & 1 \end{matrix} ⎤ ⎥ ⎥ ⎥ ⎥ ⎥ ⎥ ⎦

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Solution

The correct option is A $⎡ ⎢ ⎢ ⎢ ⎢ ⎢ ⎢ ⎣ \begin{matrix} A & B & Y 0 & 0 & 1 0 & 1 & 1 1 & 0 & 0 1 & 1 & 0 \end{matrix} ⎤ ⎥ ⎥ ⎥ ⎥ ⎥ ⎥ ⎦$
The inputs of the final gate will be $(A + B)$ and $A$

$Y = ¯ ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ ¯ (A + B) . A$

The truth table of the above expression is given by,

$\begin{matrix} A & B & (A + B) & (A + B) . A & ¯ ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ ¯ (A + B) . A 0 & 0 & 0 & 0 & 1 0 & 1 & 1 & 0 & 1 1 & 0 & 1 & 1 & 0 1 & 1 & 1 & 1 & 0 \end{matrix}$

Hence, option $(C)$ is correct.

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