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Types of Misses 2
To have less ...
Question
To have less number of capacity misses, which cache organization, will be better?
A
512 MB direct mapped cache
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B
256 MB direct mapped cache
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C
256 MB 4-way set-associative cache
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D
256 MB 8-way set-associative cache
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Solution
The correct option is
A
512 MB direct mapped cache
option (b)
Once cache is full then only capacity misses occur. Hence having larger cache causes less no-of capacity misses.
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Q.
Consider a system with single level cache. CPU requests for a memory content which causes a cache miss. Assume there are 2 such memory requests 'i' and 'j' which are sequential requests (first request 'i' and then next request is j) and cause cache miss.
Which of the following statements is/are true?
I. If 'i' causes capacity miss, then j's miss cannot be a conflict miss.
II. lf 'i' causes conflict miss, then j's miss cannot be a capacity miss.
III. If 'i' causes conflict miss, then j's miss can be a compulsory miss.
IV. If 'i' causes compulsory miss. then j's miss also can be a compulsory miss.
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If the associativity of a processor cache is doubled while keeping the capacity and block size unchanged. Which of the following is guaranteed to be not affected?
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