Which of the following correctly represents the truth table of the configuration of gates shown here?
A
ABY000011101111
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B
ABY001010101111
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C
ABY000011101110
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D
ABY001011101110
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Solution
The correct option is CABY000011101110 Both signals A and B go to a NOT gate. Hence their respective outputs will be ¯¯¯¯A and ¯¯¯¯B.
We have two AND gates after the first two NOT gates. The top AND gate has inputs ¯¯¯¯A and B and hence the output will be ¯¯¯¯A.B Similarly the bottom AND gate has two inputs ¯¯¯¯B and A and hence the output will be A.¯¯¯¯B
These two output signals finally go through an OR gate. The schematic till the OR gate is shown over here.
Hence the final output is ¯¯¯¯A.B+A.¯¯¯¯B Let us use the Boolean algebra and form a table for this output.