In both the given circuits, A and B are the inputs and Y is the output.
For first circuit, The output of the left NAND gate will be ¯¯¯¯¯¯¯¯AB.
Hence, the output of the combination of the two NAND gates is given as:
Y=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A.B.¯¯¯¯¯¯¯¯¯¯¯A.B=AB
Hence, this circuit functions as an AND gate.
For the second circuit, ¯A is the output of the upper left of the NAND gate and ¯B is the output of the lower half of the NAND gate, as shown in the following figure.
Hence, the output of the combination of the NAND gates will be given as:
Y=¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯A+¯B=A+B
Hence, this circuit functions as an OR gate.