Question

The logic gate realized from the circuit as shown in figure is ($P$ and $Q$ are inputs and $Y$ is output)

• A. XNOR
• B. XOR
• C. NOR
• D. OR

Answer 1

The correct option is B

XOR

Explanation for correct option:

In case of option B,

1. When the input in $P$ will be high PMOS will be off and NMOS will be on, then the output will be $Y=\overline{Q}$.
2. And when the input in $P$ will be low PMOS will be on and NMOS will be off, then the output will be $Y=Q$.
3. Thus, a truth table can be formed from this and this truth table will be the truth table of the XOR gate.

P	Q	Y
0	0	0
0	1	1
1	0	1
1	1	0

Explanation for incorrect option:

In case of option A,

1. The truth table for the XNOR gate is given below.
2. This is not the same as the truth table of the circuit that is obtained above.
3. Thus, this option is incorrect.

P	Q	Y
0	0	1
0	1	0
1	0	0
1	1	1

In case of option C,

1. The truth table for the NOR gate is given below.
2. This is not the same as the truth table of the circuit that is obtained above.
3. Thus, this option is incorrect.

P	Q	Y
0	0	1
0	1	0
1	0	0
1	1	0

In case of option D,

1. The truth table for the OR gate is given below.
2. This is not the same as the truth table of the circuit that is obtained above.
3. Thus, this option is incorrect.

P	Q	Y
0	0	0
0	1	1
1	0	1
1	1	1

Hence, option B is correct.