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Hardware Support for Page Table using TLB

A CPU generat...

Question

A CPU generates 32-bits virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can bold a total of 128 page table entries and is 4-way set associative.
The minimum size of the TLB tag is

A

20 bits

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B

15 bits

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C

13 bits

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D

11 bits

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Solution

The correct option is B 15 bits
Number of bits for virtual address = 32
Number of bits for pages = 4 KB
$= l o g_{2} (2^{12}) = 12$
So, number of bits for pages = 32 - 12 = 20

Number of bits for sets = $l o g_{2} (32) = 5$
So, minimum tag size = 20 - 5 = 15

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