A processor uses 36 bit physical addresses and 32 bit virutal addresses, with a page frame size of 4 Kbytes. Each page table entry is of size 4 bytes. A three level page table is used for virtual-to-physical address translation, where the virtual address is used as follows:
The number of bits required for addressing the next level page table (or page frame) in the page table entry of the first, second and third level page tables are respectively.