Assertion :In a series RLC circuit, if $V_{R}, V_{L}$ and $V_{C}$ denote ems voltage across $R, L$ and $C$ , respectively, and $V_{s}$ is the rms voltage across the source, then $V_{S} = V_{R} + V_{L} + V_{C}$ . Reason: In ac circuits, Kitchoff's voltage law is correct at every instant of time.

Both Assertion and Reason are correct and Reason is the correct explanation for Assertion

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Both Assertion and Reason are correct but Reason is not the correct explanation for Assertion

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Assertion is correct but Reason is incorrect

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Both Assertion and Reason are incorrect

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Solution

The correct option is D Both Assertion and Reason are incorrect
kirchoff's voltage law states that the directed sum of the electrical voltage around any closed network is zero. Put simply the sum of the voltages in any closed loop is equivalent to the sum of the potential drops in that loop. Therefore $V_{s} = V_{R} + V_{C} + V_{L}$ . kirchof's law is followed at every instant of time in all the circuits.

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Assertion :In a series RLC circuit, if VR,VL and VC denote ems voltage across R,L and C, respectively, and Vs is the rms voltage across the source, then VS=VR+VL+VC. Reason: In ac circuits, Kitchoff's voltage law is correct at every instant of time.

Assertion :In a series RLC circuit, if $V_{R}, V_{L}$ and $V_{C}$ denote ems voltage across $R, L$ and $C$ , respectively, and $V_{s}$ is the rms voltage across the source, then $V_{S} = V_{R} + V_{L} + V_{C}$ . Reason: In ac circuits, Kitchoff's voltage law is correct at every instant of time.