In a series LCR AC circuit RMS voltage of L,Cand R are V1,V2 and V3 respectively then
A. equal toV1+V2+V3
B. Equal to V1-V2+V3
C. More than V1+V2+V3
D. None of these
A. equal toV1+V2+V3
B. Equal to V1-V2+V3
C. More than V1+V2+V3
D. None of these
This module considers the effects of L C and R connected together in series and supplied with an alternating voltage. In such an arrangement, the same circuit current (I) flows through all the components of the circuit, and VR VL and VC indicate the voltages across the resistor, the inductor and the capacitor respectively.
shows the circuit conditions when the inductive reactance (XL) is greater than the capacitive reactance (XC). In this case, since both L and C carry the same current, and XL is greater than XC, it follows that VL must be greater than VC.
(VL = ISXL and VC = ISXC).
VS is therefore the phasor sum of the reactive voltage (VL − VC) and VR. The phase angle θ shows that the circuit current IS lags on the supply voltage VS by between 90° and 0°, depending on the relative sizes of (VL − VC) and VR. Because IS lags VS, this must mean that the circuit is mainly inductive, but the value of inductance has been reduced by the presence of C. Also the phase difference between IS and VS is no longer 90° as it would be if the circuit consisted of only pure inductance and resistance.
Because the phasors for (VL − VC), VR and VS in Fig 9.1.3 form a right angle triangle, a number of properties and values in the circuit can be calculated using either Pythagoras´ Theorem or some basic trigonometry, as illustrated in "Using Phasor Diadrams"
For example:
VS2 = (VL − VC)2 + VR2
or
Hence the answer is non of these .
This module considers the effects of L C and R connected together in series and supplied with an alternating voltage. In such an arrangement, the same circuit current (I) flows through all the components of the circuit, and VR VL and VC indicate the voltages across the resistor, the inductor and the capacitor respectively.
shows the circuit conditions when the inductive reactance (XL) is greater than the capacitive reactance (XC). In this case, since both L and C carry the same current, and XL is greater than XC, it follows that VL must be greater than VC.
(VL = ISXL and VC = ISXC).
VS is therefore the phasor sum of the reactive voltage (VL − VC) and VR. The phase angle θ shows that the circuit current IS lags on the supply voltage VS by between 90° and 0°, depending on the relative sizes of (VL − VC) and VR. Because IS lags VS, this must mean that the circuit is mainly inductive, but the value of inductance has been reduced by the presence of C. Also the phase difference between IS and VS is no longer 90° as it would be if the circuit consisted of only pure inductance and resistance.
Because the phasors for (VL − VC), VR and VS in Fig 9.1.3 form a right angle triangle, a number of properties and values in the circuit can be calculated using either Pythagoras´ Theorem or some basic trigonometry, as illustrated in "Using Phasor Diadrams"
For example:
VS2 = (VL − VC)2 + VR2
or
Hence the answer is non of these .
