Question

The circuit shown in the figure is a 4 bit DAC


The input bits 0 and 1 are represented by 0 and 5 V respectively. The OP-AMP is ideal, but all the resistances and the 5 V inputs have a tolerance of $\pm$ 10%. The specification (rounded to the nearest multiple of 5 %) for the tolerance of the DAC is

• A. $\pm$35%
• B. $\pm$20%
• C. $\pm$10%
• D. $\pm$5%

Answer 1

The correct option is A $\pm$35%

$V_0=-V_R.[d_3\frac{R}{R}+d_2\frac{R}{2R}+d_1\frac{R}{4R}+d_0\frac{R}{8R}]$

$\Rightarrow V_0=-V_R.\frac{R}{R}\left[constant\right]$

Worst case tolerance is
$V_0=\frac{1.1\times 1.1}{0.9}\times 100\%=35\%$