Question

The total number of NAND gates required to implement a $4\times 1$ multiplexer is (assuming a NAND gates of any number of inputs are available) ____

• A. 7

Answer 1

The correct option is A 7

$Y={\overline{S}}_1\overline{S_0}{I}_0+{\overline{S}}_1{S}_0{I}_1+S_1{\overline{S}}_0{I}_2+S_1{S}_0{I}_3$