1
You visited us
1
times! Enjoying our articles?
Unlock Full Access!
Byju's Answer
Other
Other
General Register Organization 1
During branch...
Question
During branch instruction execution value of program counter (PC)
A
Always updated by target address
No worries! We‘ve got your back. Try BYJU‘S free classes today!
B
Sometimes updated by target and sometimes remains same
Right on! Give the BNAT exam to get a 100% scholarship for BYJUS courses
C
PC is independent of branch instruction execution
No worries! We‘ve got your back. Try BYJU‘S free classes today!
D
Always remains same
No worries! We‘ve got your back. Try BYJU‘S free classes today!
Open in App
Solution
The correct option is
B
Sometimes updated by target and sometimes remains same
option (c)
Suggest Corrections
0
Similar questions
Q.
The branch instruction can be detected in ______ phase of instruction execution; condition evaluation for the branch instruction is done in ________ phase and program counter value is updated in _______ phase.
Q.
An instruction of size 4 Bytes is stored in memory. Which is a branch instruction and it uses PC relative mode. The target for this instruction is stored on address 560. The relative address field of instruction contains value 230. The value of program counter (PC) before the fetch of this instructions (Assume all the numbers in decimal) is
Q.
Consider an instruction pipeline with five stages without any branch prediction. Fetch Instruction (FI), Decode Instruction (DI), Fetch Operand (FO), Execute Instruction (EI) and Write Operand (WO). The stage delays for FI, DI, FO, EI and WO are 5 ns, 7 ns, 10 ns, 8 ns and 6 ns, respectively. There are intermediate storage buffers after each stage and the delay of each buffer is 1 ns. A program consisting of 12 instruction
I
1
,
I
2
,
I
3
,
.
.
.
.
.
I
12
is execute in this pipelined processor. Instruction
I
4
is the only branch instruction and its branch target is
I
9
. If the branch is taken during the execution of this program, the time (in ns) needed to complete the program is
Q.
Consider a machine where each instruction is exactly 'w' bytes long. All types of branching instructions are using PC-relative addressing mode with relative address(offset) specified in bytes to the target location of the branch instruction. Further, the offset is always with respect to the address of the next instructions in the program sequence. Consider a program (instruction sequence) with n instruction
n
u
m
b
e
r
e
d
I
0
t
o
I
n
−
2
.
L
a
s
t
i
n
s
t
r
u
c
t
i
o
n
I
n
−
1
i
s
t
h
e
branch instruction and its target is first instruction
I
0
. The value of offset for branch instruction is
Q.
An instruction pipeline takes x-cycles to execute n-number of instructions without any hazard, with hazard same n- instructions are executed in y-cycles. This hazard is a branching hazard in which each branch instruction causes 2 stall cycles. There are 54 branch instructions among n =200 total instructions. If value of y = 312.
Then number of segments in the pipeline is _______
View More
Join BYJU'S Learning Program
Grade/Exam
1st Grade
2nd Grade
3rd Grade
4th Grade
5th Grade
6th grade
7th grade
8th Grade
9th Grade
10th Grade
11th Grade
12th Grade
Submit
Related Videos
General Register Organization 1
OTHER
Watch in App
Explore more
General Register Organization 1
Other Other
Join BYJU'S Learning Program
Grade/Exam
1st Grade
2nd Grade
3rd Grade
4th Grade
5th Grade
6th grade
7th grade
8th Grade
9th Grade
10th Grade
11th Grade
12th Grade
Submit
Solve
Textbooks
Question Papers
Install app