Question

Let the clock cycles required for various operations be as follows:

Register to/from memory transfer:
3 clock cycles

ADD with both operands in register:
1 clock cycle

Instruction fetch and decode:
2 clock cycles per word

The total number of clock cycles required to execute the program is

• A. 20
• B. 23
• C. 29
• D. 24

Answer 1

The correct option is D 24

Operation	Instruction Size	(IF + ID)	(OF + PD + WB)
$R_0$, Memory [5000]	2	2 $\times$ 2 C	3C
$R_2$ $\leftarrow$ Memory [($R_1$)]	1	1 $\times$ 2 C	3 C
$R_2$ $\leftarrow$ ($R_2$ + $R_3$)]	1	1 $\times$ 2 C	1 C
Memory [6000] $\leftarrow$ $R_2$	2	2 $\times$ 2 C	3 C
Machine Halt	1	1 $\times$ 2 C	0 C
		14 C	10 C

So total (14 C + 10 C) = 24 cycles are required.