In the modulo-6 ripple counter shown in the figure. the output of the 2-input gate is used to clear the J-K flip-flops.
The 2-input gate is
A
a NAND gate
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B
an OR gate
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C
a NOR gate
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D
an AND gate
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Solution
The correct option is B an OR gate At the end of 6th pulse, all states should be cleared.
CBA = 110 ¯C¯BX = 00X
Output of desired gate should be zero as clear is given active low. So given gate should be OR as OR gate output is zero if both inputs are 0.