Question
The message bit sequence to a DPSK modulator is "1, 0. 1, 1, 0". This data is differentially encoded with unknown logic gate (EX-OR/EX-NOR) and unknown starting reference bit. Carrier phase of "π" is assigned to logic - 0 and carrier phase of "0" is assigned to logic - 1 after encoding the data. If the carrier phase corresponding to the first two message bits (from left side) are ,π 0 respectively, then the carrier phases corresponding to the remaining three message bits will be respectively