Analog Electronics GATE Questions

Practising previous years’ GATE Questions papers are the most widely used way to prepare for the GATE Exam. Candidates can practise, analyse and understand concepts while solving them. It helps students strengthen their time management skills. We have attempted to compile, here in this article, a collection of GATE Questions on Analog Electronics.

Candidates are urged to practise these Analog Electronics GATE previous years’ questions to get the best results. Analog Electronics is an important topic in the GATE question papers, and solving these questions will help the candidates to prepare more proficiently for the EE GATE exams. Therefore, candidates can find the GATE Questions for Analog Electronics in this article to solve and practise well before the exams. They can also refer to these GATE previous year question papers and start preparing for the exams.

GATE Questions on Analog Electronics

1. A sample-and-hold (S/H) circuit, having a holding capacitor of 0.1 nF, is used at the input of an ADC (analog-to-digital converter). The conversion time of the ADC is 1μsec, and during this time, the capacitor should not lose more than 0.5% of the charge put across it during the sampling time. The maximum value of the input signal to the S/H circuit is 5V. The leakage current of the S/H circuit should be less than ______.

(GATE EE 2001)

1. 2.5 mA
2. 0.25 mA
3. 25.0 μA
4. 2.5 μA

Answer (d)

2. Which of the following is true in an RC- coupled common Emitter amplifier?

(GATE EE 1992)

1. Coupling capacitance affects the high frequency (hF) response, and bypass capacitance affects the low frequency (lF) response
2. Both coupling and bypass capacitance affect the IF response
3. Both coupling and bypass capacitance affects the hF response
4. Coupling capacitance affects the lf response, and the bypass capacitance affects the hF response

Answer (b)

3. A transistor circuit is given below. The Zener diode breakdown voltage is 5.3 V as shown. Take base to emitter voltage drop to be 0.6 V. The value of the current gain β is ______.

(GATE EE 2016 Set 1)



1. 1
2. 0
3. 11
4. 19

Answer (d)

4. In the given circuit, the silicon transistor has β =75 and a collector voltage VC=9V. Then the ratio of RB and RC is ________.

(GATE EE 2015 Set 1)



1. Between 0 and 100
2. Between 100 and 110
3. Between 0 and 1
4. None of the above

Answer (b)

5. When a bipolar junction transistor is operating in the saturation mode, which one of the following statements is TRUE about the state of its collector-base (CB) and the base-emitter (BE) junctions?

(GATE EE 2015 Set 2)

1. The CB junction is forward biassed, and the BE junction is reverse biassed
2. The CB junction is reverse biassed, and the BE junction is forward biassed
3. Both CB and BE junctions are forward biassed
4. Both CB and BE junctions are reverse biassed

Answer (c)

6. A bipolar junction transistor (BJT) is used as a power control switch by biassing it in the cutoff region (OFF state) or in the saturation region (ON state). In the ON state, for the BJT __________.

(GATE EE 2004)

1. Both the base-emitter and base-collector junctions are reverse biassed
2. The base-emitter junctions are reverse biassed, and the base-collector junction is forward biassed
3. The base-emitter junction is forward biassed, and the base-collector junction is reverse biassed
4. Both the base-emitter and base-collector junctions are forward biassed

Answer (d)

7. One of the applications of the current mirror is ________.

(GATE EE 1998)

1. Output current limiting
2. Obtaining a very high current gain
3. Current feedback
4. Temperature stabilised biassing

Answert (d)

8. The depletion region (or) space charge region (or) transition region in a semiconductor p−n junction diode has _______.

(GATE EE 1996)

1. Electrons and holes
2. Positive ions and electrons
3. Positive and negative ions
4. Negative ions and holes

Answer (c)

9. The circuit shown in the figure uses matched transistors with a thermal voltage V_T=25mV. The base currents of the transistors are negligible. The value of the resistance R in kΩ that is required to provide 1μA bias current for the differential amplifier block shown is _________.

(GATE EE 2017 Set 1)



1. 170 and 174
2. 175 and 180
3. 181 and 185
4. 190 and 200

Answer (a)

10. Two perfectly matched silicon transistors are connected as shown in the figure. Assuming the β of the transistors to be very high and forward voltage drop to be 0.7V, the value of current I is (assume diode (D) is ideal) ________.

(GATE EE 2008)



1. 0 mA
2. 3.6 mA
3. 4.3 mA
4. 5.7 mA

Answer (c)

11. For the n-channel enhancement MOSFET shown in the figure, the threshold voltage Vth=2V. The drain current ID of the MOSFET is 4 mA when the drain resistance RD is 1kΩ. If the value of RD is increased to 4Ω, drain current ID will become _______.

(GATE EE 2003)



1. 2.8 mA
2. 2.0 mA
3. 1.4 mA
4. 1.0 mA

Answer (c)

12. An N-channel JFET having a pinch-off voltage (VP) of −5V shows a transconductance (gm) of 1 mA/V when the applied Gate to source voltage (VGS) is −3V. Its maximum transconductance (in mA/V) is _______.

(GATE EE 2001)

1. 1.5
2. 2.0
3. 2.5
4. 3.0

Answer (c)

13. Of the four characteristics given below, which are the major requirements for an instrumentation amplifier?

P. High common mode rejection ratio

Q. High input impedance

R. High linearity

S. High output impedance

(GATE EE 2015 Set 1)

1. P, Q and R only
2. P and R only
3. P, Q and S only
4. Q, R and S only

Answer (a)

14. A low pass filter with a cutoff frequency of 30Hz is cascaded with a high pass filter with a cutoff frequency of 20Hz. The resultant system of filter coils function as _______.

(GATE EE 2011)

1. All pass filter
2. An all-stop filter
3. A band stop filter
4. A Band pass filter

Answer (d)

15. The type of power amplifier which exhibits crossover distortion in its output is _______.

(GATE EE 2010)

1. Class A
2. Class B
3. Class AB
4. Class C

Answer (b)